

Rules can also explain how and when to perform an action. Make executes methods based on the prerequisites for creating or updating targets. "Target" is required and cannot be omitted "Precondition" and "Command" are both optional, but at least one of the two must exist.Ī rule explains how and when to reproduce certain documents that are the target of a specific rule. RECIPEPREFIX variable to other characters. If you want to use characters other than tabs as a prefix in your recipes, you can set the. Please note: you need to add a tab at the beginning of each recipe line! This is a vague place that has attracted people's attention. The recipe may have multiple commands on the same line or on its own line. A goal usually depends on several files Ī recipe (command) is an action to be performed. Prerequisites (preconditions) is a file that is used as input to create a target. The target can also be the name of the operation to be performed, such as "clean" Examples of targets are executable files or target files. The target is usually the name of the file generated by the program.
KEIL 5 TO MAKEFILE HOW TO
When explicitly requested, the makefile can also tell make how to run other commands (for example, delete certain files as a cleanup operation)Ī simple makefile consists of "rules" with the following shape: target : prerequisites recipe

To build the compilation process, to learn to use Make, we need to learn to use makefile to write, makefile, which describes how to compile and link a text editor composed of several C source files and several header files. Make is a build tool provided by GNU, mainly for C and C++ projects.
KEIL 5 TO MAKEFILE SERIES
The compilation of a series of files is called build.
KEIL 5 TO MAKEFILE CODE
The process of turning code into a feasible file is called compilation. Simply put, a makefile is a file executed by make. If you use Keil or IAR If you want to compile with the compiler, you can set the compiler information and file package path in Keil IDE or IAR IDE to compile, link and output files. If you use GNU compiler to compile when you use LiteOS to design the project, you will generally use makefile to compile and link the program. In LiteOS source code, makefile is used for batch compilation and linking of files to generated files. At the same time, LiteOS also uses this file to build an executable file for engineering projects. Abstract: This article mainly introduces makefile, a tool language commonly used for GNU gcc compilation.
